Artificial Intelligence (AI), gaming, cloud computing, and autonomous cars are all using the latest generation graphics processors (GPUs) in lieu of CPUs. The reasoning is that GPUs offer higher computational density than traditional CPUs as measured in terms of acquisition cost, size, and power requirements [Jensen Huang Keynotes NVIDIA’s 2018 GPU Technology Conference].
The implications for power architecture seem clear; 48 V will be the dominant voltage on the board with the GPU, and the final voltage will need to be somewhere around 1 V or less. Power levels are already around 1.5 kW and could soon go to as high as 3 kW per GPU. What is less clear is what will be the architecture for getting from 48 V to 1 V at these power levels.
Isolation vs. No Isolation. Regulation vs. No Regulation
The case for having isolation between the 48 V input and the point-of-load (POL) converters dates back to two requirements. The first comes from the telecom industry where the 48 V backup batteries supplied a minus 48 V rail that needed to be isolated from the positive rails required to run the digital electronics. The second requirement stems from the range of voltages that might be seen at the nominally 48 V rail. With a range of 72 V – 36 V isolation was required for safety reasons. By limiting the input range to less than 60 V, the requirements for isolation were eliminated.
With a reduced input voltage range of 36 V – 60 V (or even less in many cases), the requirements for regulation are also reduced. The primary question is whether it is more economical or efficient to regulate at both the 48 VIN – X VOUT and the POL converter, or can the burden of precise regulation be placed on the POL with the first stage delivering an output voltage proportional to the input voltage. There is no universal answer to this question, but there are more and more applications that do not require the first stage regulation and operate as DC transformers (DCX).
We will examine four different architectures as well as a spectrum of intermediate bus voltages:
- The more traditional 48 V – 12 V isolated and regulated “brick” followed by non-isolated 12 V -1 V buck converter
- Regulated, non-isolated 48 V – 12 V and 48 V – 5 V buck converter, followed by a 12 V or 5 V -1 V buck converter
- Un-regulated 48 V – 12 V or 48 V – 6 V LLC, followed by a 12 V or 6 V buck converter and,
- A regulated single-stage hybrid converter that goes from 48 V – 1 V without an intermediate stage
First, the initial stage of conversion will be examined, followed by an overview of second stage efficiencies at various voltages. By combining these results, some conclusions as to which architecture is most efficient, highest power density, and lowest cost can be drawn.
1. Isolated and Regulated Brick Converter
Isolated brick-format DC-DC converters are common in applications where high reliability, efficiency, and robust performance in complex systems is desired. The isolation is accomplished via a transformer. This approach has the twin benefits of providing a level of voltage transformation along with complete separation of input and load ground planes. The former helps maximize efficiency, and the latter is useful for both safety and to prevent or mitigate EMI and ground loop problems.
The state-of-the-art in a DOSA-standard eighth-brick converter is arguably a design using eGaN FETs and is discussed in detail in reference . The basic design is a hard-switched, fully regulated PWM 48:12 V buck converter with a full-bridge input and a center-tapped synchronous rectifier output. Typical silicon-based eighth-brick converters show maximum output power levels near 300 W and peak efficiencies of approximately 96%. Such converters include custom heat sinks in order to function at these high-power levels. An example is shown in Figure 1 (a). Such converters typically run at 150 kHz to 175 kHz in order to mitigate switching losses.
The low switching loss of the GaN transistors permit the switching frequency to be doubled to 300 kHz, which allows a great reduction in inductor and transformer size and a large increase in output current and power. The resulting converter is capable of fully regulated operation at an output current of 42 A, or 500 W at 12 V output. A peak efficiency of 96.7% at 30 A (the max load current of the silicon-based converter) was achieved, with a full load efficiency of 96.4%. A plot of efficiency versus load current for several input voltages is given in Figure 2 (b) with the corresponding simplified circuit diagram in 2 (a).
The transistors account for 28% of the total loss (approximately 1% of the total output power). On the other hand, the magnetic components account for > 48% of the total loss. This indicates that the transistors are no longer the main limiting factor in the converter design.
2. Non-Isolated DC-DC Converters 
A small, cost effective, high-efficiency, 25 A capable non-isolated 48 V to 5-12 V converter, suitable for high-performance computing and telecommunication applications, can be made using eGaN® FETs such as the EPC2053 . The EPC9093 GaN development board configured as a synchronous buck converter yields a main power stage area of only 10 mm x 9 mm, which is at least 2x smaller than its Si equivalents, and is capable of producing an output voltage ranging from 5 V to 12 V. A simplified schematic is shown in Figure 3 (a) with the actual development board shown in Figure 3 (b)
The EPC2053, shown in Figure 4, is a Generation 5 eGaN FET rated at 100 V with 3 mΩ typical on-resistance capable of carrying a continuous current of 32 A and operating at up to 150 °C junction temperature. The EPC2053 has lower parasitic capacitances and on-resistance than its silicon counterparts, yielding faster switching speed and lower power losses even at higher switching frequency. These characteristics enable increasing the output power while shrinking the volume of the converter.
When stepping down 48 V to 12 V at 700 kHz switching frequency, the EPC9093 achieves a peak efficiency of 97% at a 15 A load and maintains the efficiency above 96.5% at a 25 A load. Figure 5 shows the power efficiency up to a 25 A output current for 5 V, 9 V, and 12 V output at a 700 kHz operating frequency.
3. 48 V Step Down LLC DC Transformer [4,5]
The inductor-inductor-capacitor (LLC) resonant converter is a popular candidate to provide a high-power density and high efficiency in DC-DC power conversion. This converter can maintain a very high efficiency over a wide operating range when operated as a DC transformer (DCX) with fixed conversion ratio, making it ideal for applications having relaxed output voltage regulation requirements. The LLC can operate at high frequency allowing utilization of the parasitic elements in the circuit, thereby keeping the physical component count to a minimum.
Figure 6(a) shows the power circuit schematic of a N:1 full bridge LLC converter with center tapped synchronous rectifier, and Figure 6 (b) is a 48 – 12 V, 900 W demonstration board. This circuit operates with ZVS for all the switching devices allowing high-efficiency high-frequency operation. The primary side devices are EPC2053 transistors and the secondary rectifier devices are the 1.15 mΩ typical, 30 V rated EPC2023. The operation, design, and analysis of this converter is well documented and will not be covered here [6,7].
The LLC converter efficiency performance was measured over a load range up to 900 W and is shown in Figure 7. The efficiency performance shows that the LLC converter easily exceeds 98% over a wide load range and input voltage range.
A 1 MHz, 900 W capable, 48 V to 6 V LLC converter was also designed with an 8:1 ratio transformer using a 14-layer PCB and has a magnetizing inductance of 2.2 µH. The primary side devices are EPC2053 transistors and the secondary rectifier devices are the 1.15 mΩ typical, 30 V rated EPC2023, with each rectifier having two devices connected in parallel. The LLC converter is shown in Figure 8 with efficiency curves in Figure 9.
4. 48V-to-1V Hybrid Converter 
A new Dual Inductor Hybrid Converter (DIHC), based on the Dickson switched-capacitor converter  is proposed to effectively address the drawbacks of the conventional approaches. The DIHC, shown in Figures 10 and 11, employs two interleaved inductors at the output and eliminates two large synchronous switches S9 and S10 in the hybrid Dickson converter. These modifications enable DIHC to have nearly 2X lower DC output impedance contribution of conduction of switches and flying capacitors and thus 2X smaller conduction losses than the hybrid Dickson converter.
In addition, the two interleaved inductors with naturally self-balanced currents provide DIHC with the same benefits of multi-phase converters for high current application without additional current balancing complexity . Split-phase operation is also employed in DIHC to achieve complete soft-charging for all the capacitors. Detailed analysis on circuit operation and steady-state characteristics can be found in .
A key benefit of the DIHC is that all flying capacitors are soft-charged/discharged by inductor currents without a hard-charging mode. As flying capacitors achieve complete soft-charging, DIHC can significantly reduce capacitor size without increasing switching frequency. In addition, the inductors can be favorably sized for high power density due to the reduced switch voltage. With optimally sized small capacitors and inductors, the DIHC produces high power density power conversion, and promises high potentials for high-power and high current applications. Figure 12 shows the measured efficiency for various input and output voltages. Note that at 48 VIN to 1 VOUT the overall efficiency is 92% at 10 A. It is also beneficial that the converter efficiency is kept higher than 90% down to 20% load in data center applications, where light- load efficiency is also important for energy saving.
Optimizing the Intermediate Bus Voltage
Having explored four different topologies for 48 VIN DC-DC conversion, those observations can now be coupled with the efficiency of the second stage. In Figure 13 is shown the peak reported efficiency of various commercial POL converters at different input voltages, but always at 1 VOUT. Table 1 lists the manufacturer and the operating frequency for each data point. By simply multiplying these efficiencies with the efficiency of the first stage converters, a reasonable estimate of comparative peak efficiencies going from 48 V to 1 V can be obtained. These estimates are shown in Table 2 and are accompanied by a comparison of the relative power densities and cost of each solution.
The best efficiency was achieved with either the Dual Inductor Hybrid Converter (DIHC) or the LLC with a 6 VOUT. The DIHC topology, however, is relatively new and has yet to be widely adopted. The 48 VIN – 6 VOUT LLC, coupled with a 6 VIN – 1 VOUT buck converter is being quickly adopted in new AI and gaming applications due to its high efficiency, high power density, and low cost. Traditional bricks are going to be around for many more years but are probably not going to see much growth in leading edge high-density computing systems.
In all the topologies with 48 VIN, the highest efficiency is achieved with GaN devices. This is due to their lower capacitance and smaller size. With recent pricing declines in GaN power transistors, the cost comparison with silicon-based converters now strongly favors GaN in all the leading-edge solutions.
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Last modified: July 9, 2019